• Department: Magnetic Resonance and Bioinformatics
• Team: Measurement and Data Processing in Medicine
  
• Interests:

ADC (Analog-to-Digital Converters), DDC (Digital Down Converters), DSP.

Toolboxes for COM, LPT, GPIB and direct I/O control under Win95/98.

Universal Serial Bus controllers, POSUSB driver, USBCheck tool.

Programmable logic ICs, VHDL, JTAG, ISP.

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Copyright (2005) American Institute of Physics. This article may be downloaded for personal use only. Any other use requires prior permission of the author and the American Institute of Physics. The following article appeared in [I. Viscor et al., Rev. Sci. Instrum. 76, 115103 (2005)] and may be found at I. Viscor et al., Rev. Sci. Instrum. 76, 115103 (2005).

11/05 Clock signal requirement for high-frequency, high dynamic range acquisition systems .pdf (118k)

Analog-to-digital converters (ADC's) are increasingly replacing mixers in frequency conversion schemes. To achieve superior performances, in terms of bandwidth and dynamic range, a nearly ideal ADC clock is needed, with a spectral purity higher than the reference signal of the classical mixing scheme. These requirements of spectral purity for the ADC clock are discussed by analyzing in detail the nonuniform sampling process and by characterizing an actual acquisition system. The effect of clock phase imperfections on the output is proportional to the input frequency over sampling frequency ratio. Moreover, at the output we may have a multiple folding of the phase jitter spectrum. These effects are illustrated by three sets of measurements performed using our system: transfer of spurious clock components, aliasing of these components, and transfer of clock phase noise. (C) 2005 American Institute of Physics.

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05/01 Phase Noise Measurement .pdf (259k)

The analysis of the phase noise is presented. The phase fluctuation can be described of either standard deviation of the phase or time jitter or in detail as signal's spectrum. The digital receiver is proposed for the phase noise measurements. (Radioelektronika'01)

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09/00 Two-channel digital receiver as a measurement unit .pdf (130k)

A digital receiver was proposed (AD6644, AD6620, ADSP2181). This paper discusses the critical hardware sections, the limiting system parameters and the first measurements. (Radioelektronika'00)

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05/00 Gray counter in VHDL .pdf (96k)

This paper presents the simple structural description of the Gray counter with variable width in VHDL. (Student FEI 2000)

Cited by:
VHDL.ORG
Scalable Gray Code Counter - US patent

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06/99 The digital receiver utilizing AD6620 for NMR ... /in Czech/ .pdf (127k)

This paper describes a new digital receiver unit using digital down converter AD6620. Some technical problems with utilizing this circuit are figured. (Sbornik studentu a doktorandu'99)

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04/99 DSP and digital down conversion .pdf (73k)

The comparison of three single chip digital down converters (HSP50016, HSP50214, AD6620), their parameters, features and critical sections are presented. (Radioelektronika'99)

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(30.3.2000)